1. Field of the Invention
The invention relates generally to signal frequency synthesis and more particularly to a frequency synthesizer and a method using a first seed word and a variable clock rate derived from a second seed word for synthesizing a microwave signal frequency.
2. Description of the Background Art
Microwave frequency synthesizers play a crucial role in consumer, industrial and military applications. They are found in test systems for cell phones, radars and communication transceivers.
The performance, cost and size of a synthesizer has a very substantial impact on commercial success and operational viability in numerous instances. Low phase noise, fine frequency resolution, low spurious signal levels and fast switching speed are key performance factors that in the microwave range heretofore could only coexist in costly, physically large and power-hungry products.
Microwave frequency synthesizer architectures fit into 2 broad categories—direct analog and indirect. The direct analog approach is based on the implementation of simple arithmetic operations with components such as mixers, filters, frequency multipliers, frequency dividers, and signal path switches. The resulting solutions have the desired performance, but when applied in the microwave frequency range, are costly, bulky and power consuming.
Indirect synthesis architectures make use low frequency direct digital synthesis and one or more signal-switching-path phase-locked loops (PLL)s. Single switching loop PLL architectures have low cost, small size and low power consumption by virtue of their simplicity. Such simple architectures are used in applications that do not require the level of performance demanded in military and high volume test applications. However, in order to meet a high level of performance, complex solutions having multiple phase-locked loops, sometimes as many as 8 or 10, are required in the signal switching path. As a result, the PLL implementations of frequency synthesizers that are capable of meeting demanding performance are also costly, bulky, and have high power consumption.
Phase noise in synthesized output signals using phase-locked loop architectures is in great part proportional to the ratio of the output frequency of the phase-locked loop to the input (or reference) frequency. Therefore, a high reference frequency is called for. Unfortunately, the high reference frequency makes it difficult to achieve fine frequency resolution. In order to resolve this difficulty while still achieving low phase noise, fractional N and sigma delta systems are used. However, the phase-locked loops for such systems must be relatively narrow in order to prevent spurious signal sidebands. Unfortunately, the narrow phase-locked loops in the signal switching path cause slow switching speed of the output frequency.
An invention is needed for microwave frequency synthesis having the simplicity of a single switching-path loop with the high performance previously only available with direct analog and multi-loop techniques.